LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

-- SaturatingCounter
-- 
-- Inputs:
-- incount = "Increment Counter". For some reason, using the name count causes errors because it's written
-- somewhere else.
-- reset = The reset signal.
--
-- Outputs:
-- saturatedcount = The contents of our counter.
--
-- This is just a basic saturating counter.


ENTITY SaturatingCounter IS
   PORT(
	   incount, reset			 : IN STD_LOGIC;
       saturatedcount 		 	 : OUT STD_LOGIC_VECTOR(16 DOWNTO 0)
       );
END SaturatingCounter;

ARCHITECTURE dummy_satcounter_arch OF SaturatingCounter IS

COMPONENT SeventeenBitCounter IS
	PORT
	(
		aclr		: IN STD_LOGIC ;
		clock		: IN STD_LOGIC ;
		cnt_en		: IN STD_LOGIC ;
		q		: OUT STD_LOGIC_VECTOR (16 DOWNTO 0)
	);
END COMPONENT;

SIGNAL tempcount : STD_LOGIC_VECTOR(16 DOWNTO 0);

BEGIN

-- Just count whenever you get an "increment count" signal and tell us what you're at.
-- Count_enable is controlled by the largest bit of the 17-bit sequence. This makes more
-- sense than using a 16-bit counter because if we did that we'd need to compare that 
-- every bit is asserted, instead of just checking that biggest bit. (Which would save
-- time in the counter.) If memory is a bigger issue than response time, we can cut this
-- back to a 16-bit counter to reduce memory space, but we'll have a lot more logic
-- per increment.
Count: SeventeenBitCounter PORT MAP (reset, incount, NOT(tempcount(16)), tempcount);
saturatedcount <= tempcount;
   
END dummy_satcounter_arch;